| [Netlist 29-101] Netlist 'slave_local_clock' is not ideal for floorplanning, since the cellview 'slave_local_clock' contains a large number of primitives.  Please consider enabling hierarchy in synthesis if you want to do floorplanning. 但是由于我设计的是时钟模块,需要96bit宽度作为时钟,采用48bit second,32bit nanosec,16bit p-second,所以向大佬们请教一下,有没有更好的设计办法。(必须要采用这种时钟位宽方法。或者不采用这种规定位宽,有没有什么好的方法
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