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修改FPGA工程后,MZ7XB系统无法启动

文档创建者:zuojinjingand
浏览次数:5338
最后更新:2019-01-25
硬件:MZ7XB开发板
修改了米联提供的FPGA程序,删除了HDMI输出部分,增加了AXI_BRAM和一个计数器,如下图

BLOCK DESIGN

BLOCK DESIGN

重新生成bit和fsbl文件,执行get_hw_description,生成u-boot,烧入TF卡,然后系统启动不正常,打印信息如下:


U-Boot 2018.01 (Jan 24 2019 - 20:21:17 -0500)

Model: Zynq mz7x Development Board
Board: Xilinx Zynq
Silicon: v3.1
DRAM:  ECC disabled 512 MiB
MMC:   sdhci_transfer_data: Error detected in status(0x208000)!
sdhci@e0100000: 0 (SD), sdhci@e0101000: 1 (eMMC)
SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In:    serial@e0001000
Out:   serial@e0001000
Err:   serial@e0001000
Net:   ZYNQ GEM: e000b000, phyaddr 0, interface rgmii-id
eth0: ethernet@e000b000
Hit any key to stop autoboot:  0
SDCARD Boot Mode
[INFO] Scanning mmc 0...
switch to partitions #0, OK
mmc0 is current device
reading uEnv.txt
63 bytes read in 13 ms (3.9 KiB/s)
Loaded environment from uEnv.txt
Importing environment from mmc 0...
[INFO] Trying to boot from mmc 0
reading uImage
3975256 bytes read in 382 ms (9.9 MiB/s)
reading devicetree.dtb
10318 bytes read in 20 ms (502.9 KiB/s)
** Unable to read file uramdisk.image.gz **
## Booting kernel from Legacy Image at 02080000 ...
   Image Name:   Linux-4.14.0-xilinx
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    3975192 Bytes = 3.8 MiB
   Load Address: 00008000
   Entry Point:  00008000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
   Booting using the fdt blob at 0x2000000
   Loading Kernel Image ... OK
   Loading Device Tree to 1eb14000, end 1eb1984d ... OK

Starting kernel ...

Booting Linux on physical CPU 0x0
Linux version 4.14.0-xilinx (root@osrc) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11-rc1)) #1 SMP PREEMPT Thu Jan 24 06:29:41 EST 2019
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: Zynq MZ7X Development Board
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x1f000000
random: fast init done
percpu: Embedded 16 pages/cpu @debc7000 s34764 r8192 d22580 u65536
Built 1 zonelists, mobility grouping on.  Total pages: 130048
Kernel command line: console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 493060K/524288K available (6144K kernel code, 239K rwdata, 1564K rodata, 1024K init, 153K bss, 14844K reserved, 16384K cma-reserved, 0K highmem)
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
    vmalloc : 0xe0800000 - 0xff800000   ( 496 MB)
    lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .text : 0xc0008000 - 0xc0700000   (7136 kB)
      .init : 0xc0900000 - 0xc0a00000   (1024 kB)
      .data : 0xc0a00000 - 0xc0a3bfc0   ( 240 kB)
       .bss : 0xc0a3bfc0 - 0xc0a62684   ( 154 kB)
Preemptible hierarchical RCU implementation.
        RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
        Tasks RCU enabled.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to e0800000
slcr mapped to e0802000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at e0802100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at e080a000, irq=17
Console: colour dummy device 80x30
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xe0840000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 25, base_baud = 6249999) is a xuartps
console [ttyPS0] enabled
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
media: Linux media interface: v0.10
Linux video capture interface: v2.00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
EDAC MC: Ver: 3.0.0
FPGA manager framework
fpga-region fpga-full: FPGA Region probed
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
TCP established hash table entries: 4096 (order: 2, 16384 bytes)
TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
hw perfevents: no interrupt-affinity property for /pmu@f8891000, guessing.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
workingset: timestamp_bits=30 max_order=17 bucket_order=0
jffs2: version 2.2. (NAND) (SUMMARY)  &#194;&#169; 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac:         DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
Unhandled fault: imprecise external abort (0x406) at 0x00000000
pgd = c0004000
[00000000] *pgd=00000000
Internal error: Oops - BUG: 406 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.14.0-xilinx #1
Hardware name: Xilinx Zynq Platform
task: de43b840 task.stack: de43c000
PC is at xilinx_dma_chan_reset+0x20/0x13c
LR is at xilinx_dma_probe+0x7f4/0x948
pc : [<c033d62c>]    lr : [<c033e25c>]    psr: 20000013
sp : de43de20  ip : de4fee34  fp : 00000000
r10: 00000000  r9 : de53b010  r8 : 00000000
r7 : 00000000  r6 : debefd18  r5 : ddc1da10  r4 : ddc1da10
r3 : e08d0000  r2 : 00000000  r1 : ddc1dc20  r0 : ddc1da10
Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
Control: 18c5387d  Table: 0000404a  DAC: 00000051
Process swapper/0 (pid: 1, stack limit = 0xde43c210)
Stack: (0xde43de20 to 0xde43e000)
de20: ddc1dc10 ddc1da10 debefd18 00000000 debefa34 c033e25c c0802c74 ddc1da10
de40: de589318 00000000 ddc1dc20 00000000 00000000 00000001 00000020 c081deec
de60: 00000001 00000020 00000000 c033da68 de53b010 c0a140b8 00000000 c0a140b8
de80: 00000000 00000000 00000000 c03b5220 de53b010 c0a56394 c0a56398 c03b3d68
dea0: de53b010 de53b044 c0a140b8 c0a18df0 00000000 c093f830 c093383c c03b3ea8
dec0: 00000000 c0a140b8 c03b3e2c c03b25b8 de472f58 de53dc34 c0a140b8 de4ec800
dee0: 00000000 c03b33e0 c0802e05 c0802e06 00000000 c0a140b8 c0a3bfc0 c0933834
df00: c09173f8 c03b462c ffffe000 c0a3bfc0 c0933834 c01019ac c0886804 00000000
df20: 00000000 c0132bd0 00000000 c08857d8 000000d0 00000006 00000006 c0886818
df40: 000000cf c0886818 defffe09 00000000 00000000 00000007 c0a3bfc0 c0933830
df60: 00000007 c0a3bfc0 c0933834 000000d0 c0a3bfc0 c0900da4 00000006 00000006
df80: 00000000 c090059c 00000000 c06472fc 00000000 00000000 00000000 00000000
dfa0: 00000000 c0647304 00000000 c0106fb0 00000000 00000000 00000000 00000000
dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 b3bfabab 7ebf9eee
[<c033d62c>] (xilinx_dma_chan_reset) from [<c033e25c>] (xilinx_dma_probe+0x7f4/0x948)
[<c033e25c>] (xilinx_dma_probe) from [<c03b5220>] (platform_drv_probe+0x50/0x9c)
[<c03b5220>] (platform_drv_probe) from [<c03b3d68>] (driver_probe_device+0x1ec/0x2b0)
[<c03b3d68>] (driver_probe_device) from [<c03b3ea8>] (__driver_attach+0x7c/0xa8)
[<c03b3ea8>] (__driver_attach) from [<c03b25b8>] (bus_for_each_dev+0x7c/0x8c)
[<c03b25b8>] (bus_for_each_dev) from [<c03b33e0>] (bus_add_driver+0x16c/0x1d4)
[<c03b33e0>] (bus_add_driver) from [<c03b462c>] (driver_register+0xa0/0xe0)
[<c03b462c>] (driver_register) from [<c01019ac>] (do_one_initcall+0xf8/0x118)
[<c01019ac>] (do_one_initcall) from [<c0900da4>] (kernel_init_freeable+0x188/0x1c8)
[<c0900da4>] (kernel_init_freeable) from [<c0647304>] (kernel_init+0x8/0x108)
[<c0647304>] (kernel_init) from [<c0106fb0>] (ret_from_fork+0x14/0x24)
Code: e5933000 e0833002 e5938000 f57ff04f (e5903000)
---[ end trace 48c4da54243014cb ]---
Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

CPU0: stopping
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G      D         4.14.0-xilinx #1
Hardware name: Xilinx Zynq Platform
[<c010e764>] (unwind_backtrace) from [<c010a98c>] (show_stack+0x10/0x14)
[<c010a98c>] (show_stack) from [<c0637308>] (dump_stack+0x80/0xa0)
[<c0637308>] (dump_stack) from [<c010ceb8>] (ipi_cpu_stop+0x3c/0x70)
[<c010ceb8>] (ipi_cpu_stop) from [<c010d6d8>] (handle_IPI+0x64/0x84)
[<c010d6d8>] (handle_IPI) from [<c0101420>] (gic_handle_irq+0x84/0x90)
[<c0101420>] (gic_handle_irq) from [<c010b3cc>] (__irq_svc+0x6c/0xa8)
Exception stack(0xc0a01f48 to 0xc0a01f90)
1f40:                   00000001 00000000 00000000 c0116640 00000000 00000000
1f60: ffffe000 c0a03c68 c0a03cb4 c0933a30 00000000 00000000 1e287000 c0a01f98
1f80: c01079bc c01079ac 60000113 ffffffff
[<c010b3cc>] (__irq_svc) from [<c01079ac>] (arch_cpu_idle+0x1c/0x38)
[<c01079ac>] (arch_cpu_idle) from [<c01494d4>] (do_idle+0xf8/0x1a8)
[<c01494d4>] (do_idle) from [<c01496bc>] (cpu_startup_entry+0x18/0x1c)
[<c01496bc>] (cpu_startup_entry) from [<c0900bbc>] (start_kernel+0x304/0x364)
[<c0900bbc>] (start_kernel) from [<0000807c>] (0x807c)
---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b


请大神帮忙看一下!!!

发表评论已发布 2

uisrc

发表于 2019-1-25 11:43:16 | 显示全部楼层

有点像是文件系统出问题,删除VDMA HDMI输出后,是否也把system_top.dts 有关VMDA输出部分的设备树删除了?
越努力越幸运!加油!

zuojinjingand

发表于 2019-1-25 13:05:41 | 显示全部楼层

admin 发表于 2019-1-25 11:43
有点像是文件系统出问题,删除VDMA HDMI输出后,是否也把system_top.dts 有关VMDA输出部分的设备树删除了? ...

设备树没有进行更改,我尝试修改一下。如果设备树进行更改后,rootfs、kernel是否都需要重新make?

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