VHDL程序综合时报错

出错地方的程序如下： library IEEE;use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use ieee.std_logic_textio.all;
use ieee.numeric_std.all;
rem_r <= rem_r SLL 2; a <= a SRL 4;
rem_r <= rem_r +a;
rem_r <= rem_r SRL 2;
a <=a SLL 4;
a <= (a SLL 2);
root <=root SLL 2;
div <= root +1;
root <= root SRL 1;
错误如下：
ERROR:HDLCompiler:1731 - "F:\fpga_tuxiang_program\div\sqrt\sqrt.vhd" Line 69: found '0' definitions of operator "+", cannot determine exact overloaded matching definition for "+"

是不是我应该再加上什么库，那要加上什么呢？

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