// FIFO Implementation generate for(byte_index=0; byte_index<= (C_S_AXIS_TDATA_WIDTH/8-1); byte_index=byte_index+1) begin:FIFO_GEN reg [(C_S_AXIS_TDATA_WIDTH/4)-1:0] stream_data_fifo [0 : NUMBER_OF_INPUT_WORDS-1]; // Streaming input data is stored in FIFO always @( posedge S_AXIS_ACLK ) begin if (fifo_wren)// && S_AXIS_TSTRB[byte_index]) begin stream_data_fifo[write_pointer] <= S_AXIS_TDATA[(byte_index*8+7) -: 8]; end end end endgenerate
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